[SOLVED] Reduction operator on a multi dimension vector

rahdirs · May 31, 2017

Hi,

I had a basic question, as in what would be the dimension of the o/p after performing a reduction operator on a multidimension vector ?

Sippose I have a vector,

Code Verilog - [expand]
1
logic [1:0] test [5:0];

Would |test give a 2 bit o/p ? or would it also do a bit wise OR of all bits to give a single bit ?

dave_59 · May 31, 2017

The Verilog bit reduction operator is only allowed with integral (packed) bits; |test is illegal.
The SystemVerilog or reduction method would perform a bitwise or with each element.

test.or() is equivalent to test[0] | test[1] |... | test[4] and the result is a 2-bits.

|test.or() results in a single bit.

[SOLVED] Reduction operator on a multi dimension vector

rahdirs

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dave_59

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[SOLVED] Reduction operator on a multi dimension vector

rahdirs

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