Hello,
My goal is to synthesize RTL in any specific technology library using Design Compiler. However, as you know the implementation of RTL using HDL consumes significant time. Therefore, I would like to explore HLS. I 've been reading about Vivado HLS which has a free version for students, but before going in depth with this tool. My question is, Can I use the generated RTL from Vivado, and use it in Design Compiler instead of a FPGA? or is there any other HLS tool available for students that generates RTL from C and I can use it with Design Compiler, that you recommend?
Thanks