Hi, the above structure is the GPS downconverter IC CXA3355R from Sony:
**broken link removed**
They use a so call "Phase Shifter and Adder" to reject the image.
Is this Phase Shifter:
1. a polyphase filter
2. a 90deg phaseshift as the img below
3. or can be sth else?
I think that last figure is a block diagram representation only. The implementation is using polyphase, that's the most commonly used architecture. The possible problem could be in the big values (and size) of R & C due to the low freq (1 MHz).
Also in R versus C there is a compromise:
Large R -> small C -> High noise figure
Large C -> small R -> Big area
After all analog design is to find the best compromise.....
The simple RC networks are, as you pointed out, not the most suitable one for high performance systems (high rejection).
People tend to incorporate careful layout for phase matching (+45 / -45 deg) and include some limiting amp. for amplitude balance in simple RC app's.
Well, actually you can improve the performance by calibration. A little bit messy but it works. The calibration complexity must obviously be considered against polyphase filter silicon area and signal attenuation.
The principle is the same for image rejection calibration. You can find good papers describing it (e.g. IEEE).
It is basically compensation of the phase and amplitude errors in either a feedback/analog or pure digital signal manner.
CXA3355 use a 90 deg Phase Shifter, and active low pass filters (point nr 2, in your enumeration).
Also some reviews said that this IC works better with external IF filter, instead of using the internal ones.