For any other commenters: **broken link removed**
First off, check your phy's datasheet, it should have a reference design. Look for what it wants the center tap to be biased to. Tie that to pin 4 (usually calls for a .1uF bypass cap.) That the two are tied internally is usually not a problem*. The datasheet should also have a RJ-45 side recommendation, probably (from pin 13) a 75 ohm resistor in series with a 2KV capacitor to chassis ground (possibly with other 75 ohm resistors from the unused 4+5 8+7 pairs to the same capacitor.)
*Otherwise, if tying them together is a problem for your phy, there are tons of other vendors out there with different package styles.