reading values from file in verilog

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anne rachel

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I am not able to simulate a verilog code where i am reading the input values from a .txt file.Kindly help me in solving dis issue....



Thanks in advance....
 

I guess, you should start with showing your code.
 

the code is quite big ..this is the piece of code which reads values from the file...

module data_mem(index,A,B);
input wire[0:2] index;
output reg[0:128] A;
output reg[0:128] B;
reg [0:128] dmem[0:4];
initial $readmemb("data.txt", dmem);

always @(index) begin
A<=dmem[index];
B<=dmem[index+1];
end
 

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