Re: Rail-to-rail circuit simulation
Hi,
Maybe you meant to post in the Analog Integrated Circuit Design section. I don't know about this stuff, presumably a Bode plot (AC analysis in simulator I use) would be useful, and capacitative load plus resistive load seems a benchmark. I guess r-2-r in and out would show a small 'dead zone' at lowest and highest Vin at Vout. A range of temperature analyses are good - where hopes of success after multiple promising simulations at +27C are chewed up (or not, hopefully) by undesirable things happening at max. -C and max. +C. Max. frequency before Vout looks hideously unrecognizable. There are lots of things to check. Did you mention step input and ringing?
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I want to add, it depends on the kind of op amp aimed for... 1.8 to 5.5V CMOS or 2.7 to 36V bipolar, JFET inputs, etc. Other stuff like uA of quiescent current at max. operating temperature may matter to you or maybe need-for-speed bandwidth will matter more than Ferrari-level guzzler of supply current. Input offset voltage and current might be interesting, too. Any crossover distortion, I think it's called, too.