hyleeinhit
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Hi, guyes,
I ran into problem when I simulate input inferred equivalent noise with AMI 0.5um CMOS process with cadence spectre. I followed noise analysis note in https://www.ece.tamu.edu/~spalermo/ecen474/noise_sim_notes.pdf and set the flicker noise simulation parameters:
[For NMOS model, add the following to the end of your model :
KF=0.276E-25 &
AF=1.53 &
)
For PMOS model, add the following to the end of your model :
KF=0.466E-26 &
AF=1.61]
In noise analysis, I set iprobe3 as output and Iin as input current source. Iin DC value is set at 10nA for DC bias; Iin AC magnitude is set at 1 for noise simulation.
To display the input referred current noise, I selected RESULT->DIRECT PLOT->EQUIVALENT INPUT NOISE. However, I got quite strange input referred current noise result: Noise in high freq. domain is higher than that in low freq. domain. In theory, should low freq noise be higher than high freq noise because of flicker noise?
Anyone can help me out?
I ran into problem when I simulate input inferred equivalent noise with AMI 0.5um CMOS process with cadence spectre. I followed noise analysis note in https://www.ece.tamu.edu/~spalermo/ecen474/noise_sim_notes.pdf and set the flicker noise simulation parameters:
[For NMOS model, add the following to the end of your model :
KF=0.276E-25 &
AF=1.53 &
)
For PMOS model, add the following to the end of your model :
KF=0.466E-26 &
AF=1.61]
In noise analysis, I set iprobe3 as output and Iin as input current source. Iin DC value is set at 10nA for DC bias; Iin AC magnitude is set at 1 for noise simulation.
To display the input referred current noise, I selected RESULT->DIRECT PLOT->EQUIVALENT INPUT NOISE. However, I got quite strange input referred current noise result: Noise in high freq. domain is higher than that in low freq. domain. In theory, should low freq noise be higher than high freq noise because of flicker noise?
Anyone can help me out?
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