Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Question regarding high frequency PSRR at regulator output vdd18

Status
Not open for further replies.
S

surianova

Advanced Member level 1
Joined
Sep 1, 2004
Messages
411
Helped
30
Reputation
60
Reaction score
8
Trophy points
1,298
Location
ASIA
Activity points
3,266
hi all!

i have a question regarding high frequency psrr at regulator output vdd18

vdd33 is my power supply at the board. I put 1 uF cap as a byapss cap to filter high frequency noise.

vdd33a is power supply that in the chip( after the package and bondpad)
gnda is gnd in the chip.

vdd33a will go through a regulator to provide vdd18.

the question is when i put a capacitor around 100pF between vdd33a and gnda, the psrr of vdd18 at high frequncy is degrade . Why? should take it out?
i thought 100pF shd be good to filter out high frequency noise?

thank you
 

decoupling cap

What chip are you using? Without knowing the chip and its requirements its quite difficult to say what the problem is. You can try a 1nF bypass capacitor but I'm not sure if that will solve the problem.
 

Re: decoupling cap

RossiRPI said:
What chip are you using? Without knowing the chip and its requirements its quite difficult to say what the problem is. You can try a 1nF bypass capacitor but I'm not sure if that will solve the problem.
Click to expand...

thechip is used for transceiver for optical fiber.
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top