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While going through ASIC Chip Synthesis by Himanshu Bhatnagar, (page=67) this question popped up on operating condition
It is written as -- A library is characterized using one set of operating conditions. During synthesis or timing analysis, if another set of operating conditions is specified, then DC uses the K-factors to derate the delay values based upon the specified operating conditions.
Now my question is - if library guy characterized a lib at particular PVT, then in that case while using that lib in DC do I have to use same PVT/operating condition by while that lib is characterized?
If I wanted to use another corner then dose it mean K-factor will come in to picture?
(I searched on net for the same, but i am getting confused.) Can you please put some light on it? and share your insights?
**broken link removed**
It is written as -- A library is characterized using one set of operating conditions. During synthesis or timing analysis, if another set of operating conditions is specified, then DC uses the K-factors to derate the delay values based upon the specified operating conditions.
Now my question is - if library guy characterized a lib at particular PVT, then in that case while using that lib in DC do I have to use same PVT/operating condition by while that lib is characterized?
If I wanted to use another corner then dose it mean K-factor will come in to picture?
(I searched on net for the same, but i am getting confused.) Can you please put some light on it? and share your insights?
**broken link removed**