Hi all,
I tried post-layout simulation for a simple inverter, in the spectre.out file, it says:
Notice from spectre during topology check.
Only one connection to node 'vdd!'
and output waveform confirmed that vdd is not actually supplied to internal transistors of the symbolized, extracted inverter. The vdd pin in the inverter is set to inputout(I/O type), connected(status) as shown below?
so what should i do to have the vdd supply really affect the inverter?
thanks a lot,
Kevin
I really can't find a reason, sorry! Check your Spectre netlist if it really contains the global vdd! and vss! nodes where necessary. If not, supply the missing "!" manually and re-simulate (without another netlisting, of course).
And may be the short-cut between gnd! and the "0" node is missing?
Good luck! erikl