question : Floating nodes after transient sim. in Cadence ?

[cmos_ajay]

I have a transient simulation running in Cadence. I am powering 'down' my analog circuit in the middle of this simulation.
How do I check for floating nodes after the circuit has been powered down ??

On the schematic I have already done Options -> Check rules setup -> Floating nets = Warning

I will appreciate the reply.

 

[erikl]

The Floating nets Electrical Rules Check (ERC) has nothing in common with high impedance nets during power down state. The connectivity in this state is still the same.