question about translinear loop used in class ab stage

[afujian]

How to ensure the current through M9 be equally divided by M3 and M7 ?All of the current flow through M3 while M7 stays off or triode in my simulation (closed loop or open loop) ,please help me out,thanks!

 

[erikl]

The pMOS-to-nMOS W/L ratios in your figure rely on a process µ0_n/µ0_p ratio of 3 . You might want to adapt their ratios to the proper µ0_n/µ0_p ratio of your process.

 

[afujian]

hi erikl,sorry for the late reply ,I think i it over for these days and also tried to adjust the circuit according to your suggestion, but the circuit seems to be vulnerable,although the 2 transistors can be santuration ,one of them still tend to be cut off or
subThreshold easily .BTW,I simulated it with open loop.

 

[erikl]

... or subThreshold easily .BTW,I simulated it with open loop.

Hi afujian,
subThreshold is still ok.

Simulate it under real application conditions (i.e. in closed loop). It's totally ok, if the 2 transistors are still in saturation in such case!

 

[afujian]

Thank you erikl , I should not simulate it with open loop config.