liwei039
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when I do at-speed DFT, I want to using the PLL output as refclk1 for launch and capture clock.
But there is a question, if the default PLL output clock frequency is not what I want. How can I make the PLL output clock turn to the right frequecy?
Use strap pin?
2. Can I config the PLL register to change the PLL frequency? I dont think so, but why?
thanks
But there is a question, if the default PLL output clock frequency is not what I want. How can I make the PLL output clock turn to the right frequecy?
Use strap pin?
2. Can I config the PLL register to change the PLL frequency? I dont think so, but why?
thanks