[Question] 2nd-Order SDM ,Integrator output saturation

[peter_hawk]

integrator output

Dear all:
I am now desinging a 2nd-order sigma delta modulator.
The architecture is gain=0.5 in both Integrator. ( Boser / Wooley 1988)
I use simulink to run simulation. (SDT Tool
by S. Brigati Ver.(0.1) 08/04/98)

Input: 0.5 sinewave
Quantizer: +1 / -1
Opamp saturation voltage in Integrator: +1.35 / -1.35 <== ?


This is Ideal 2nd-Order SDM Simulink



This is the ideal Integrator with opamp saturation voltage


This is the PSD of Ideal 2nd-Order SDM
(input=0.5, opamp saturation voltage=1.35)


First Integrator output ( have some data >1 and <-1)



If I modify the opamp saturation voltage from 1.35 to 1 (quantizer output +1/-1)
The PSD is very poor


PSD of 2nd-Order SDM with OPAMP Saturation Amplitude=1
The output of 1st Integrator ouput is saturation at +1 / -1

Can anyone give me some suggestions?

 

[shaq]

ideal integrator simulink

Try to consider the "overdrive voltage" effect during running simulation. Or, you can adjust the gain of integrators smaller.