I am designing a SPWM, which works with a Look-Up Table (LUT) in order to "draw" the sines and a triangular wave.
Now I want to be able to modify the amplitude of the sine, so I was thinking about threating the LUT values as fixed point, so I can multiply it for 0.xx (0-99% of amplitude). If there's a better method, I'm interested aswell.
Error (10481): VHDL Use Clause error at fixed_pkg_c.vhd(23): design library "IEEE_PROPOSED" does not contain primary unit "fixed_float_types". Verify that the primary unit exists in the library and has been successfully compiled.
I have readen it is needed to comile with VHDL-93, I don't know if that's true or not, nor how to change the compilation process. Also, I am working with SoC, so the HPS is needed. I don't know if that's important to say or not.
You need to include the library files to your project, also fixed_float_types. This is the VHDL93 version of the fixed point package, but the synthesis tool can be still set to VHDL 2008.
You need to include the library files to your project, also fixed_float_types. This is the VHDL93 version of the fixed point package, but the synthesis tool can be still set to VHDL 2008.
To obtain relative lengths of pulses, take the sine of 0-360 degrees (that is, whatever mark you're at in the cycle). Example, pulse length at 45 degree mark is .707 times pulse length at 90 degree mark.
That calculation gives you maximum amplitude. If you want reduced amplitude, make all pulse lengths shorter by the same proportion.
Well, I'm using Quartus Lite. I tried to import the library adding the VHD files to the project and referencing them on the place where I use the ufixed data type. It still throwing error with 93 and 2008 compilers.
To obtain relative lengths of pulses, take the sine of 0-360 degrees (that is, whatever mark you're at in the cycle). Example, pulse length at 45 degree mark is .707 times pulse length at 90 degree mark.
That calculation gives you maximum amplitude. If you want reduced amplitude, make all pulse lengths shorter by the same proportion.
I didn't understand you, but it sounds good. I am using a LUT with the values of a 0-360º sine wave. My idea was using fixed point to allow multiplication for 0.xx factor (where xx goes from 01 to 99). Could you repeat your idea in an easier way, please?
You will need to compile the files into the IEEE_PROPOSED library in quartus. You can do this in the file properties, or adding -library IEEE_PROPOSED to the .qsf file.
You will need to compile the files into the IEEE_PROPOSED library in quartus. You can do this in the file properties, or adding -library IEEE_PROPOSED to the .qsf file.
Could you give me some more details. I have also readen this other answer from you in another thread: https://www.edaboard.com/showthread.php?373860-Compile-package-into-quot-ieee_proposed-quot
I have added the file to the project, changed the properties to "Library File" and it doesn't work.
After this, I have given in the properties the value of "work" in "Library" field.
I am using now VHDL-93.
You need to set the library property to IEEE_PROPOSED for all of the fixed point library files. That should be fixed_float_types.vhd and fixed_pkg_c.vhd
I'm sure you're on the right track. From seeing your initial post it sounded as though you really were calculating with geometry, finding where the ramp waves and sine waves intersect, to get your pulse lengths.
Both, "fixed_float_types" and "fixed_pkg_c" are on top. I have tried the two combinations and the result is in both cases the same.
The error still the same I posted in the first picture.
I added the fixed_pkg.vhd, fixed_float_types.vhd and txt_util.vhd.
The sources seemed to be different. I had the file "fixed_pkg_c.vhd" which was long and another one from another source wich was "fixed_pkg.vhd" and was quite shorter. I had to replace their names and use the long one with the name of the short one.
Anyway, the ufixed type is now recognized by my synthetiser.