Different implementation methods for thermal vias have their pros and cons, see this recent thread:
https://www.edaboard.com/threads/365046/
Solder paste patterns are used to reduce the solder amount for large pads. In the present design, it looks like the QFN pads get potentially too much solder (paste pad reduction may be suitable) and the exposed pad too little. Can be better determined after reflow.
A low power IC like the RF transceiver can however tolerate some voids in the exposed pad soldering because heat dissipation is small (< 100 mW). A low inductance electrical connection will be achieved with little solder anyway. Would be more critical for switch mode converters or power transistors.
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I believe the thermal pad solder will work well for CC1310.
but how can we prevent the solder flowing through the vias if these aren't tented? How could I do that in this design?
You don't necessarily need to prevent it absolutely, review the quoted application note in the linked thread.
One possible strategy is to make the thermal vias so small, that the drained solder amount is sufficiently low. If you look at the design of commercial PCBs, that's a frequently implemented option.
There's one absolute contraindication for solder wicking vias, that's double side reflow solder with exposed pad components assembled in the first pass. Then you get solder protruding conflicting with solder screen printing for the second pass. Via tenting or plugging required in this case.
There's also a certain possibility that solder wicking pulls down the QFN component and causes shorts on the outer pads.