HDL is still the predominant way to design FPGAs.
And If you intend on making a career out of it - it's a must.
If you're a hardware engineer I suggest Verilog / System Verilog.
Of course - understanding the basic design elements of a digital circuit is a prerequisite (MUX, DFF, RAM, etc...).
But IMO joining a group of first adapters of some sort of a niche open source Python to Hardware venture, when you have zero experience & knowledge of how things actually work under the hood is a bad idea.