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Purpose of transistors attached with source degeneration MOS

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The basic idea is to run M3 and M17 current sources with equal current and thus keep M14 and M15 free of DC bias current. If so, there's only AC signal across M14/M15 drain-source. Scaling M16 varies M14/M15 Vgs and changes the source degeneration resistance respectively.

Can ISS of M17 and M18 be varied so that we can vary the resistance upto a certain extent in such a way that the transistor M14 and M15 remain in triode?In stead of scaling M16 so that we can make it tunable?
 

Apparently not intended in the original circuit (all current source have same reference), but possible. Preferably you would tune both P and N current sources to avoid DC bias of M14/M15.
 

Apparently not intended in the original circuit (all current source have same reference), but possible. Preferably you would tune both P and N current sources to avoid DC bias of M14/M15.

Thanks for your reply.

If I use two separate current sources Iss1 FOR M3 and Iss2 for M17 & M18 keeping transistors M14 and M15 in triode. and vary Iss2 for varying the resistance of M14 and M15.

Because when I am simulating this and varying Iss2 of M17 and M18 keeping Iss1 of M3 constant , the resistance of M14 and M15 in increasing and it increases the circuit linearity. But some DC current is flowing from M17, M16 AND M14, M15 to the differential pair.

By keeping both P and N current source same poor linearity is achieved. and I am varying Iss2 (M17) only to make circuit tunable. Is it possible to only varry Iss2 to tune the circuit and allow the DC current to flow through M14, M15 to differential pairs.?
 

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