As far as I understand the question from nnayak82, he has no problem but he wants to know the REASON for the described phenomenon.
Here is my answer which is rather simple: The pulse series between 0 and Vmax volts has, of course, a mean value (Vmax/2 for a duty cycle of 1:1).
This mean value which is identical to the dc component of the corresponding FOURIER series cannot pass the capacitor (in the steady state!) in contrast to all other FOURIER components (which are ac). Thus, the signal after passing the capacitor is a pulse series without a dc component (between -Vmax/2 and +Vmax/2).