Simple answer: If the voltage level is within the specified input voltage range of the FPGA, the yes.if I use the BAT54, is only -400mV. It is a good solution?
The resistor is only necessary if the current through the BAT54 will be too high (set the limit somewhere in the range 1-10mA) without it.
BAT54 is fine if the signal speed isn't too high. You didn't yet mention the input frequency or minimal pulse width.
--> then you need to install a current limiting resistor between the -3,3V source and the "-0.4 V" BAT signal.
Hi,
We already did discuss about voltage and current.
What else: the next is frequency...
This is determined by source resistance and load capacitance
Klaus
Why? Please explain.In this case, the logic level 1 (in my case +3.3V) will have a lowering
A good engineer does not rely on "hope". ;-) He uses the datasheet. --> Check V_IH_min.I hope this won't cause problems.
Why? Please explain.
A good engineer does not rely on "hope". ;-) He uses the datasheet. --> Check V_IH_min.
A voltage drop only happens when there is current.I think that there is a voltage drop on my resistance. Am I wrong?
Not stupid.Unfortunately I'm not an electronic engineer, I'm a programmer who delights in hardware!
For this reason, my questions are probably stupid!
that's all it takes. you're an electronics engineer. go studyUnfortunately I'm not an electronic engineer, I'm a programmer who delights in hardware!
no such thing as a stupid questionFor this reason, my questions are probably stupid!
Hi,
A voltage drop only happens when there is current.
So what current do you expect?
Let's use your input resistance of 1MOhms ... then it will be 3.3uA worst case.
On a 200 Ohms resistor this means a voltage drop of 660uV..this is less than 1mV.
So with 3.3V .... the input voltage is 3.29934V
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