somf0872 said:
1) PB1.1 as an output pin giving a regular clock pulse with a frequency of 20MHz i.e (high level = 25ns and low level = 25ns).
Note: I am working on DAC8043A in which serial data is clocked into the input register on the rising edge of the CLOCK pulse. When the new data word has been
clocked in, it is loaded into the DAC register with the LD input pin. Data in the DAC register is converted to an output current by the D/A converter.
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Your requirement it's a killer task for AVR ATMega162.
The uC execute one instruction during 1 clock period but that's 1/16 MHz = 62,5ns
How do you think you'll be able to drive your pin 25ns up, 25ns down and even more counting 12 such clocks ?
Nevertheless that toggling output pin need some constraints due to pipeline execution.
Even using the hardware peripheral like included timers you won't be able to solve your problem.
Looking further to your request I think I get the point.
You're new to world of microcontroller but definitely must know how to read a data sheet.
The 25 ns clock pulse width (high or low) is the minimum required of the DAC8043 interface.
You need such narrow pulses as long as the current settling time of the DAC8043 is 1 micro seconds.
My question is what is the period of the signal applied to /LD pin. I mean how often do you want to update the 12-bit shift register ?
What are you doing with the current delivered by the DAC8043 ? What's your application ?
Just because you can load the 12-bit shift register with pulses period of let's say 1ms (by far more relax for AVR) and being able to convert your numerical code into current 12ms after.
Don't bother with 25ns if you don't need to.