process varation help plz plz plz plz

[mehran1367]

hi all, i have a 8 bit processor . i want to estimate the power of this processor. i used DC . now i want to find out the process variation effect . to find out how much the power may change. plz help


plz

tanx

 

[shatruddha]

During Idle run, these processors user very less power. To check for maximum power usage, you need to really bumbard it with heavy processes and use all the features in maximum swing.

 

[mehran1367]

what about process variation. i mean the ics from the same kind have different power consumption. how can i model that?

 

[hlyupin]

Use the same DC but with different liberty PVT

 

[mehran1367]

i dont know how to do that? you mean i should use hspice?

 

[matter]

I will explain what hlyupin had posted.

Lets assume that you have used some type of std cell library to design your 8bit processor in DC. You should be knowing what kind. If not go back and study the basics. If you are still not able to figure out, see your link variables in DC_shell. i.e. load your desing and do a list_libs or printvar *link*. This is should give you some clue.

Now, letus assume that you are using "std_lib_SS" type lib. The SS will represnt the slow PVT corner. What hlyupin is suggesting is for you to re-run DC with the same design, but use a different PVT lib. Lets say you also have a "std_lib_FF" lib. Now you need to change your link_lib variable to point to the std_lib_FF lib and re-do your analysis. You should be getting a different power value from what you got before. This difference will represnt the corner variation in power.