begin
process (a,b )
begin
y <= a nand b ;
end process;
library ieee;
use ieee.numeric_bit.all;
signal count: unsigned (3 downto 0);
process
begin
wait until clk = '1';
if reset = '1' then
count <= "0000";
else
count <= count + "0001";
end if;
end process;
begin
process
begin
a<='1';
b<='2';
end process
library ieee;
use ieee.numeric_bit.all;
signal count: unsigned (3 downto 0);
process
begin
wait until clk = '1';
if reset = '1' then
count <= "0000";
else
count <= count + "0001";
end if;
end process;
begin
process
begin
a<='1';
b<='2';
end process
begin
process
begin
a <= '1';
a <='0';
end process ;
begin
process
begin
a <= '1';
wait for 10 ns ;
a <='0';
end process ;
Code:begin process begin a <= '1'; wait for 10 ns ; a <='0'; end process ;
now it will get a value of 1 , and then 0 after 10 ns right. but we will not be able to see the difference , because of this short delay , to make the led to get on and off we either need to increase the delay or has to provide a clck such tht or its rising edge only , it switches from on to off and vice versa . am i correct ?
Just assign them without a wait statement...when i want to implement the program in fpga , then what do i need to do for a signal assignment .
ok , i have got it . but wait statement is not synthesizable so , when i want to implement the program in fpga , then what do i need to do for a signal assignment .
ok , i have got it . but wait statement is not synthesizable so , when i want to implement the program in fpga , then what do i need to do for a signal assignment .
begin
process
begin
a <= '1';
wait for 10 ns ;
a <='0';
wait for 10 ns ;
end process ;
begin
process
begin
a <= '1';
var := 5000;
while var >0 loop
var := var-1;
end loop;
a <= '0';
var := 5000;
while var >0 loop
var := var-1;
end loop;
end process ;
so that means either a signal assignment occurs only when all the statements in the process get executed (when there is sensitivity list) or if it gets a wait sttement (when there is no sensitivity list ).
Code:begin process begin a <= '1'; wait for 10 ns ; a <='0'; wait for 10 ns ; end process ;
now in the above example since there is no sensitivity list so wait statement is needed . but wait is not synthesizable so by writing a delay , in place of wait statements we can assign a signal.
Code:begin process begin a <= '1'; var := 5000; while var >0 loop var := var-1; end loop; a <= '0'; var := 5000; while var >0 loop var := var-1; end loop; end process ;
so here a will behave like a clock with the delay as provided between on and off state . i hope now atleast am correct .......
begin
process
begin
a<='1';
wait for 10 ns;
a<='0';
wait for 10 ns;
end process;
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