prasanta_g
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Hi,
I am working in TSMC 65n technology.
Can any body help me about how to choose the process variation of resistor and capacitor with NMOS and PMOS process variation?
For example, let I am using rppoly_m resistor and crt_mom(because my load is crt_mom) capacitor for miller compensation. Driver of the second stage is NMOS.
To compensate 2nd pole Rz=(1+CL/Cc)/gm
Now Cl/Cc is constant for all process and voltage.
So Rz should vary with gm.
Now Rz and gm is two independent process parameter.
That is why I am asking for some help about the choosing of process corner of resistor and MOS.
I am working in TSMC 65n technology.
Can any body help me about how to choose the process variation of resistor and capacitor with NMOS and PMOS process variation?
For example, let I am using rppoly_m resistor and crt_mom(because my load is crt_mom) capacitor for miller compensation. Driver of the second stage is NMOS.
To compensate 2nd pole Rz=(1+CL/Cc)/gm
Now Cl/Cc is constant for all process and voltage.
So Rz should vary with gm.
Now Rz and gm is two independent process parameter.
That is why I am asking for some help about the choosing of process corner of resistor and MOS.