[SOLVED] Problems with writing UVM test for GPIO UVC

[DanilPro]

Hello!

I'm new with UVM and I'll be grateful if anyone could help me to solve the problem with executing test written with SV.

I use the example code of GPIO UVC from Cadence Inc. In addition, I've written my own test library, testbench and test_top module for simulation (shown below). But after starting test with ncsim, I got this information from log file and didn't get any waves for chosen signals. I suppose that UVC can't create any sequences for sequencer. May be anyone know what the cause of this is?

SVSEED set randomly from command line: 936318831
ncsim>
ncsim> source /media/test/Cadence/INCISIV12.20.001/tools/inca/files/ncsimrc
ncsim> source /media/test/Cadence/INCISIV12.20.001/tools/uvm-1.1/uvm_lib/uvm_sv/files/tcl/uvm_sim.tcl
ncsim> run
----------------------------------------------------------------
CDNS-UVM-1.1b (12.20-p001)
(C) 2007-2012 Mentor Graphics Corporation
(C) 2007-2012 Cadence Design Systems, Inc.
(C) 2006-2012 Synopsys, Inc.
(C) 2011-2012 Cypress Semiconductor Corp.
----------------------------------------------------------------

*********** IMPORTANT RELEASE NOTES ************

You are using a version of the UVM library that has been compiled
with `UVM_NO_DEPRECATED undefined.
See http://www.eda.org/svdb/view.php?id=3313 for more details.

You are using a version of the UVM library that has been compiled
with `UVM_OBJECT_MUST_HAVE_CONSTRUCTOR undefined.
See http://www.eda.org/svdb/view.php?id=3770 for more details.

(Specify +UVM_NO_RELNOTES to turn off this notice)

UVM_INFO @ 0: reporter [RNTST] Running test gpio_multiple_simple_sequence_test...
stop -create -name Randomize -randomize
Created stop Randomize

-----------------------------------------------------------
Name Type Size Value
-----------------------------------------------------------
gpio_cfg gpio_config - @5537
active_passive uvm_active_passive_enum 1 UVM_ACTIVE
-----------------------------------------------------------
-----------------------------------------------------------------------------------
Name Type Size Value
-----------------------------------------------------------------------------------
uvm_test_top gpio_multiple_simple_sequence_test - @160
gpio_demo_tb0 gpio_demo_tb - @5470
gpio0 gpio_env - @5579
agents[0] gpio_agent - @5781
driver gpio_driver - @6020
rsp_port uvm_analysis_port - @7581
sqr_pull_port uvm_seq_item_pull_port - @7478
monitor gpio_monitor - @5469
item_collected_port uvm_analysis_port - @5957
agent_id integral 32 'h0
checks_enable integral 1 'h1
coverage_enable integral 1 'h1
sequencer gpio_sequencer - @11
rsp_export uvm_analysis_export - @6142
seq_item_export uvm_seq_item_pull_imp - @7309
arbitration_queue array 0 -
lock_queue array 0 -
num_last_reqs integral 32 'd1
num_last_rsps integral 32 'd1
is_active uvm_active_passive_enum 1 UVM_ACTIVE
agent_id integral 32 'h0
dut_csr_port_in uvm_analysis_imp - @5684
num_agents integral 32 'h1
intf_checks_enable integral 1 'h1
intf_coverage_enable integral 1 'h1
-----------------------------------------------------------------------------------

--- UVM Report catcher Summary ---


Number of demoted UVM_FATAL reports : 0
Number of demoted UVM_ERROR reports : 0
Number of demoted UVM_WARNING reports: 0
Number of caught UVM_FATAL reports : 0
Number of caught UVM_ERROR reports : 0
Number of caught UVM_WARNING reports : 0

--- UVM Report Summary ---

** Report counts by severity
UVM_INFO : 1
UVM_WARNING : 0
UVM_ERROR : 0
UVM_FATAL : 0
** Report counts by id
[RNTST] 1
Simulation complete via $finish(1) at time 0 FS + 186
/media/test/Cadence/INCISIV12.20.001/tools/uvm-1.1/uvm_lib/uvm_sv/sv/base/uvm_root.svh:435 $finish;
ncsim>

 

[meir]

I am not familiar with the GPIO UVC but it seems that the test shuts down after zero time.
The first thing to check is do you have a sequence, have you connected it to the GPIO sequencer and does
the sequence raise an objection until it finishes the body

 

[DanilPro]

Thanks, meir, for your advice! It turned out that the sequencer didn't get sequenses properly