What would the spikes in this output be a result of? This is the output of a 1-bit DAC implemented by complimentary switches. The input is a square wave, and the DAC is switching to high or low depending on the square wave input. So im guessing this occurs from switching characteristics of a mosfet. But i would like to know EXACTLY why it occurs. Im sure somebody knows.
Would it be internal capacitance of mosfets, w/l ratios which are 20 by the way. They are BSIM3v3 mosfets.
Capacitive feed through is a possibility. One way to test for this is to have slower input logic level edges and see if the output spikes are lower amplitude but longer duration.
On the practical side, your system will have a low pass filter following the DAC and this filter will remove these spikes. Then the remaining problem will be the spikes adding a small amount to the error budget of the analog output voltage.
Another problem I am having with this 1-bit DAC design is that the swithes connected to the negative ref voltage, limit the DAC output swing to only +-1.34V instead of +-1.75V. When i replace these switches with ideal ones i get the full swing.
Is there anything i can do that would alleviate this problem. Or do I have to choose a different design for my DAC?
This may be caused bo the on resistance of your transistors. Try making the transistors larger (which will make the glitch problem worse) or increase the reference voltage or design the rest of your circuitry to work with the lower output.
It looks like,
the clock feedthrough,
as it is pointed out, it you increase the
size of the switch, it is going to get worse.
Try to decrease the slope of the clokc signal