Problem with watchdog of 74hc423.

[baffi]

Good day,

I have some questions, if you will have time to dedicate to me.

I have the necessity to verify that the 8051 (Philips P89C51RC) installed on
my card, I don't understand because it stops, for problems hd or fw.
The control I would want could
cyclically be effected departed an interval of time second T=3.

Every suggestion is obviously well I accept, the photo of the card prototype
spun is in enclosure. Before having a printout to build I would want to introduce the
control in object. After I make a PCB.

Every according to the micro8051 reset 74hc423,
if the signal that arrives stays tall or low for
more than three seconds 74hc423 sends to a command of reset to 8051.


All ok

8051
h....__...__....__
l __| |__| |__| |__ ....
1s 1s 1s 1s 1s 1s

Controller only low
h
l ____________________



Bad 8051

8051
h....__...__
l __| |__| |_____________...

Controller
h........................................_
l ____________________| |__
reset 8051


In attach the scheme.

I hope to have been clear.
1000 thanks in advance.

 

[IanP]

Re: Watchdog by 74hc423.

The P89C51RD has build-in watchdog-timer ..
Is there any reason why you wouldn't use this function instead of adding external timer that performs similar function?

See data sheet for detailed info on Watchdog-Timer:
**broken link removed**

Regards,
IanP

 

[baffi]

Re: Watchdog by 74hc423.

Hi IanP,
no there is a particular reason, perhaps it is some one reboot in case of block.

I see da datasheet
with the registers CCAP4L and CCAP4H how much maximum interval 65535? (8bit + 8bit)
or 16383 (14bit) ?

See page 30 of datasheet:
"Using the WDT
To enable the WDT, user must write 01EH and 0E1H in sequence to
the WDTRST, SFR location 0A6H. When WDT is enabled, the user
needs to service it by writing to 01EH and 0E1H to WDTRST to
avoid WDT overflow. The 14-bit counter overflows when it reaches
16383 (3FFFH) and this will reset the device."

Thanks