During each SPI clock cycle, a full duplex data transmission occurs: the master sends a bit on the MOSI line; the slave reads it from that same line; the slave sends a bit on the MISO line; the master reads it from that same line. Not all transmissions require all four of these operations to be meaningful but they do happen.
If you need the MISO line (since the MCU is slave) to stay at a steady state (0 or 1), keep updating the data register (SPDR) with 0 or 0xFF. Or just leave it unconnected.