[SOLVED] problem with layout of resistance and capacitor

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eklikeroomys said:
Ask for the process design rule documents, process parameter documents
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routig neds to be done through m5 and m6....how to connect m5/m6 to m1 have no contacts to connect m5 to m1 directly nor m6 to m1
 

You cant connect M1 directly to M5 or M6, you need to make a via stack, in other words: Connect M1 to M2, M2 to M3, M3 to M4, M4 to M5. This is the only way to make a connection between M1 and M5.
 


This is a mimcap, MiM stands for metal-insulator-metal so no poly is involved nor present in the layout

Since you see via5 this should suggest you that metal5 and metal6 are involved.

Anyway I had a look use metal 6 for the top plate and metal5 or 6 for the bottom plate
 


top[ plate as in layout.....

might sound silly but i am a bit confused

c when the layout appears the two column terminal is on the top of the screen and the multi column terminal at the bottom ...but if i think of the layers as one over anather....look at as if its been flattened in one dimention it appears the multi layer terminal is on a metal layer on top of anathermetal layer...that thinking makes it the top layer

so which one is the top layer...
shud i look at it in two dimensions or imagine it in three dimension??
 

erikl said:
May be this figure (from a different process) may be helpful: View attachment 56408
Click to expand...

so i think i have to imagine in three dimension so the multiple column terminal is top layer

---------- Post added at 22:30 ---------- Previous post was at 22:25 ----------

thanks to all three of you
 

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