use ieee.std_logic_arith.all;
--libraries to be used are specified here
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
signal X: std_logic_vector(3 downto 0);
begin
gc0: game_counter port map (inCLK, inRST, COUNT_NUM);
process(COUNT_NUM)
begin
if (COUNT_NUM = "1000") then
equal <= '1';
unequal <= '0';
else
equal <= '0';
unequal <= '1';
end if;
COUNT_NUM <= X;
end process;
process(inCLK)
begin
if rising_edge(inCLK) then
if X = 8 then
EQUAL <= X;
else
UNEQUAL <= X;
end if;
end if;
end process;
process(clk)
begin
if rising_edge(clk) then
if enable = '1' then
--do something
end if;
end if;
end process;
process(clk)
begin
if rising_edge(clk) then
count <= count + 1;
if count = 77 then --just detect 1 value, doesnt really matter what
enable <= '1'; --only high for 1 clock cycle and low for 2^n-1 clocks (where n is the width of the counter)
else
enable <= '0';
end if;
end if;
end process;
You missed to tell about it.But I have other errors. again.
if (count rem 16) = 0 then --high for 1, low for 15
count := count + 1;
if count < 9 then
X <= level + 1;
else
X <= level;
end if;
end if;
No, that is not what I want. I mean I don't want to prevent count from exceeding a value of 1.The remainder 16 operation seems pretty useless for a range 0 to 9 integer. Nevertheless it prevents count from exceeding a value of 1. Is this what you want?
Code:
Hope you can explain this.you're generating a load of clocks rather than generating a load of enables.
Apparently, there's no multiple driver issue in the posted code.But what does the error "can't resolve multiple constant drivers mean"?
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