Problem: run uvm "hello_world" example with Questasim 10.2c in windows 7 64bit

[Renjie]

Problem: run uvm "hello_world" example with Questasim 10.2c in windows 7 64bit

Hi guys,

Does anyone know if the Questasim 10.2c can run the uvm in win7 64bit ? I did some research before and aware that Questasim comes with a pre-compiled uvm & dpi. Here is the blog post: http://blogs.mentor.com/verificationhorizons/blog/2011/03/08/using-the-uvm-10-release-with-questa/

I try to build a project and include all the design files, compile... then I have some errors, like "consumer.sv(22): (vlog-2730) Undefined variable: 'packet'.", “consumer.sv(22): near "uvm_component": syntax error, unexpected IDENTIFIER”. Good thing is the "hellow_world.sv" compiled successfully.

I guess I still need to compile the uvm.

After running "vlog +incdir+C:/questasim64_10.2c/verilog_src/uvm-1.1d/src C:/questasim64_10.2c/verilog_src/uvm-1.1d/src/uvm_pkg.sv", I try to compile the design files again. It's getting worse this time, more errors.

Can anyone tell me the mistake I made? Also, for simulation step, I think there is a way to use the pre-compiled dpi, however as a windows 7 64-bit system, do I need to add any extra command while running the vism?

Thank you!

 

[dave_59]

Re: Problem: run uvm "hello_world" example with Questasim 10.2c in windows 7 64bit

You should not have to compile the UVM or DPI for Questa 10.2. I suggest you start over by deleting your work directories. Then compile your files again and only look at the first error. Compiler errors after the first one are not always relevant. If you are getting undefined variable 'packet', that is not because of missing the UVM, that is a problem with your code.

 

[Renjie]

Re: Problem: run uvm "hello_world" example with Questasim 10.2c in windows 7 64bit

Hi Dave,

I did what you suggested and I got the same errors again, just like what I got the very first time. These design files are copied from uvm-1.1d/example, I didn't even edit them.


- - - Updated - - -

Hi Dave,

I have figured out the compile step problem. The "hello_world.sv" file turns out to be the very top one that I need to concern with. For vism step, I tried with command "vsim hellow_world.sv". It just opens the design file in Questa. Did I miss something?

 

[dave_59]

Re: Problem: run uvm "hello_world" example with Questasim 10.2c in windows 7 64bit

If you are going to use the command line instead of the GUI, you need to read the Questa User Manual (chapter 7) and learn the basic steps needed to run a SystemVerilog simulation.

0. create a work library (at least the first time)
vlib work
1. compile the files that make up the design in the proper order
vlog hello_world.sv
2. Simulate by specifying the top level scope of the design
vsim hello_world