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Hi, please help me.
I've problem on using MIG Example design. Place&route goes failed when I set Global optimization = Speed on Map properties(any other thing is not changed).
I used default example design and default ISE project for MIG controller(only changed Global optimization)
some info:
## FPGA family: virtex6
## FPGA: xc6vsx315t-ff1156
## compoenent MT41J64M16XX
no error reported but place and route failed with this warning:
I need this option on map properties because I want to use this design inside other project that needs this option.
I've problem on using MIG Example design. Place&route goes failed when I set Global optimization = Speed on Map properties(any other thing is not changed).
I used default example design and default ISE project for MIG controller(only changed Global optimization)
some info:
## FPGA family: virtex6
## FPGA: xc6vsx315t-ff1156
## compoenent MT41J64M16XX
no error reported but place and route failed with this warning:
WARNING:Route:436 - The router has detected an unroutable situation for one or more connections. The router will finish the rest of the
design and leave them as unrouted. The cause of this behavior is either an issue with the placement or unroutable placement constraints.
To allow you to use FPGA editor to isolate the problems, the following is a list of (up to 10) such unroutable connections:
Unroutable signal: u_memc_ui_top/u_mem_intfc/phy_top0/u_phy_data_io/gen_dqs[1].u_phy_dqs_iob/dqs_p_iodelay pin: ddr3_dqs_n<1>/O
Unroutable signal: u_memc_ui_top/u_mem_intfc/phy_top0/u_phy_data_io/gen_dqs[0].u_phy_dqs_iob/dqs_p_iodelay pin: ddr3_dqs_n<0>/O
I need this option on map properties because I want to use this design inside other project that needs this option.