how we can know the difference between two complementary and unsigned value in verilog code when we do subtraction that it's value can be both negative and positive numbers?
In Verilog 2001, you can now declare signed variable and it will automatically be 2's compliment signed variable.
Code:
wire signed [7:0] inp1; //will take negative values as 2's compliment
reg signed [7:0] inp2; //will take negative values as 2's compliment
assign inp1 = 10000000; // It means -128 in two compliment
initial begin
inp2 = -5; //Verilog will itself give it the value of [B]8'b11111101[/B] i.e. signed -5
end
actually if you declare normal variables as well, you can assign negative values and it will be itself converted to
2's compliment, but of course since it is unsigned variable, it cannot be then used normally for 2's compliment
operations normally...
for further study read this link and search this Register Data type
AHHH also the MSB indicate the negatove or positive value i.e. it is the signed bit