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Preventing antenna effect in IC layout design

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ryusgnal

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Attached is some notes about antenna effect in Layout IC Design. The notes explain that to prevent the antenna effect we need to make a discontinuity in metal 1. It means that we have to connect metal 1 to metal 2 and connect it again to metal 1. how about i connect metal 1 with metal 2 and didn't connect again with metal 1? is the antenna effect still occur?
 

Antenna Effect

antenna rule only cares about the M1 hooked up with gate, as long as you can keep the size of M1 small enough, for your case, where M1 is connected to M2 and did not connect to M1 again, that should be fine.
but actually, in CMOS design a gate is always connected to a diffusion or a pad, don't know when the case you described will happen.
 

    ryusgnal

    Points: 2
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Re: Antenna Effect

Yes, the antenna effect will still occur if you don't go back to met1 or up to met3 for that matter. During plasma etching of any metal layer, ions will be collected by the metal itself (the wafer is held at ground potential) and eventually harm the thin gate oxide. The ammount of charge (or number of ions) collected depends on the total area of metal connected to a gate. Let's assume the maximum ratio of metal to gate area allowed is 3000/1 for a given technology process. So you will still violate the rule if you only connect three squares of met1, then go up to met2 and connect 5000 squares to a one square poly gate. The trick is to either place a "jumper" on a higher metal (a minimum area of metal is sufficient!) and then go back down to the lower metal or to connect zener diode to the metal path (usually a single contact to a p- diffusion is sufficient) to divert excess charge.

Hope that helps!

C.
 

    ryusgnal

    Points: 2
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Re: Antenna Effect

Is antenna effect only occur at the gate oxide? how about the drain and source? can we connect drain or source to large area of metal 1?
 

Re: Antenna Effect

no, large metal always not good for antenna.
 

Re: Antenna Effect

To date, I haven't heart of any charge induced damage to diffusions during wafer processing. The potentials that can occur are not high enough to cause irreversible damage to diffusions. I may stand corrected for technologies <90nm, but other than that, gate oxides are the weak point.
If you have concerns, you should always contact your fab! They must be able to provide any information applicable to your process option.

Regards,

C.
 

Re: Antenna Effect

CK815 said:
I may stand corrected for technologies <90nm.

It means that we can ignore antenna effect for <90nm technology, do you have any reference for that? I really need it . Anyway i work with 0.18um technology. Can I just ignore the antenna effect?

Thanks for reply.
 

Re: Antenna Effect

You cannot ignore antenna effect for gates! My statement was referring to diffusions. So generally, I don't see any danger for diffusions of minimal transistors in these tech nodes. What you have is basically a diode structure, as the substrate of the wafer is held at a potential (usually ground) during etching. Gate oxide is affected because it is very thin and therefore cannot withstand charges which may accumulate during etching.

Hope that helps!

C.
 

    ryusgnal

    Points: 2
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Re: Antenna Effect

hi
if u connect metal 1 to m2 then m2 to poly . If the m2 is short then it will avoid the antenna effect
the idea of using metal jumber is during the fabrication of long metal it will not be connected with the poly by ising higher metal in between . The toplevel metal will fabricate later only & it should be near to poly also
i think now you r clear
regards
analayout
 

Re: Antenna Effect

Hello Friends,

I have always had a very strange doubt about antenna effect.

What I have understood is "Antenna Rules restrict the metal area that can be connected safely to a gate".

Now if I split the metal 1 because the area was more, and take vias to metal 2, and again we bring back the connection to metal 1 using another via, this way we are dividing the total metal area into three parts say a1, a2, a3. My doubt is when the final connectin is made, the total charge accumulated individually by a1, a2 and a3 will add up and cause damage to the gate oxide. So how are we avoiding oxide break down???

Thanks
 

Re: Antenna Effect

hi
the antenna effect is happening during the etching process
see if u made a1 a2 a3
during the mi etch the larger a1 area is not getting contact with poly bcz a2 area is not yet created
durig a2 etching it is contact with poly with short distance only that is why we can
avoid the large area
i think during m2 ething no charge will create on m1 rather than which r getting contact with m2
ih this case a1 has no effect bcs during a2 etching gate contact is as follows
a2 a3 poly so it will not cause antenna efect
hope that nw u r clear
regards
analaout
 

Re: Antenna Effect

Correct, charge will only accumulate at the metal layer to be etched as this is the metal being in direct contact with the plasma. I understand your concern about the small metal area jumering eg. metal1. But what is important is the area of metal directly exposed to plasma! So if you use a small met2 jumper to avoid antenna effect on met1, you're on the safe side.

Regards,

C.
 

Re: Antenna Effect

CK815 said:
So if you use a small met2 jumper to avoid antenna effect on met1, you're on the safe side.

What if i use large area of metal2 jumper? Is Antenna effect still happen?

Thanks,
 

Re: Antenna Effect

if m2 area is more than the limit it will cause antenna effect
that time u should use small m3 jumber
regards
analayout
 

Re: Antenna Effect

Hello Friends,
I need Antenna Theory and Design book by Professor Warren L. Stutzman and Gary A. Thiele

Please send me the link, from where i can download this book.

Or even if this book available please send the link
Microstrip Antenna Design (Artech House Microwave Library
by K. C. Gupta (Editor), Abdelaziz Benalla (Editor)
ISBN-10: 0890061807

I am very new into this Field of Antenna Design, please suggest me How Can i become excellent Antenna Designer.


Regards
Karthik
 

Re: Antenna Effect

I see there is still some confusion about the antenna effect. Let's try an example:
Your design rules state that the maximum ratio of a given metal layer to gate- poly is 3000/1. Assuming we have a minimal gate connected to a very long metal1 trace which exceeds this ratio, we can solve this problem by jumpering metal1 on metal2 using just a short trace on met2. If we would "jumper" the metal1 trace with another long metal2 trace that also exceeds our max ratio of 3000/1 (met/poly- gate) we again violate the rule. The ammount of charge accumulated during an etch step only depends on the area of metal directly exposed to the plasma. It doesn't matter if we have 1000's of squares of metal connected to our jumper on lower metal layers!

I hope that gives you a better picture.

Regards,

C.
 
Re: Antenna Effect

i go through this thread and come to know that reactive ion etching process takes place in every metal layer formation on die.is it correct there is m1 ion etching m2 ion etching,...etc will happen?
 

Antenna effect is present on every piece of metal (and poly).
The quantitative effect depends on the periphery of the to-be-
etched feature (the area, is masked by PR; the edge being cut
away, is where the action is).

A gate oxide which allows a lot of tunneling current (which is
almost any sub-100nm node) may be more tolerant, but the
gate area is also so much smaller (at minimum) that you could
still put an insanely large charge to a very small area and bother
some weak spot, if you tried.
 

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