Thanks for the answers. Regarding the question about the S1-S2 layers, this type of structure is proposed by others too for example here
https://www.pcbway.com/blog/Engineeri...___Simple.html you can find a similar structure for a 16 layer board. My question had to do only about the thickness of the dielectrics in power planes (PWR-GND). I read somewhere that making this dielectrics thin you can increase planar capacitance which is useful for decoupling. On the other hand many say that if you decrease this dielectric thickness you might encounter problems with thermal dissipation of the board. So whats the case?