Hi rellutzu,
The best answer for your question comes straight from the source:
http://www.atmel.com/dyn/resources/prod_documents/doc4284.pdf
You should be aware of the bidirectional status of the 89S52's reset pin : input and output, not only input as usual.
From data sheet:
A high on this pin for two machine cycles while the oscillator is running
resets the device. This pin drives high for 98 oscillator periods after the Watchdog times
out. The DISRTO bit in SFR AUXR (address 8EH) can be used to disable this feature. In
the default state of bit DISRTO, the RESET HIGH out feature is enabled.
Concerning to EA and ALE status, if EA is tied to VCC, program fetches to addresses 0000H
through 1FFFH are directed to internal memory and fetches to addresses 2000H
through FFFFH are to external memory. The ALE is input only during programing. You can reduce EMI using the 89S52' sfeature of disabling the ALE pulses during internal program fetches or let it flow. But I don't see any reasons for tied to VCC and solving your problem doing so.
Regards,
Silvio