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Power MESFET/GaAs FET bias - a hint.

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nandopg

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decoupled source resistors

A hint for PA designers:

It is well known the problem to bias a power MESFET or GaAs FET due the need to have a negative gate voltage.
Does anybody tried to do the gate bias using a resistor at source instead of a negative power supply?
I have been using this approach successfully designing PAs ranging 1 to 50Watts for L,S and C bands.
For LNAs I have to stand a very small degradation in the noise figure.

If you have the same problem with the negative gate bias you should try this technique.

NandoPG
 

flatulent

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old trick

This was the standard way to bias small signal JFET transistors. The main disadvantage is the lowering efficiency because the drain-source voltage swing is lower.

BJT bias was done the same way with an emitter resistor and base voltage source.

Bypassing the emitter or source resistor should remove the noise problems. Not bypassing it will provide feedback to make the gain stable and raise the input impedance all at the cost of lower gain which is hard to get at higher frequencies.
 

nandopg

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The drain to source DC voltage it is not reduced, as the VDD should be increased by the drop voltage across the source resistor.
The measurement of amplifier's PAE for the GaAs FET biased with a source resistor or a negative power supply is essentially the same.
In the case of LNA's the true impedance of the bypass caps on source terminal plus the effect of the connecting tracks will decrease a little bit the minimum noise figure of the device plus bias network.
In any case, mainly for battery powered systems, the use of a self-bias through a source resistor is an advantage.

NandoPG
 

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mixed bag

I was just illustrating how every design is a compromise between conflicting requirements. As you show, the efficiency is reduced for a given output power for the advantage of circuit simplicity. There is one more advantage. DC bias stability. This bias is fool proof and will protect the active device against over current conditions.

It days past using thermonic valves (US= vacuum tubes) a hybrid bias arrangement was used. This resistive method to protect the device combined with a netgative voltage source for the main bias. This was a trade off between efficiency and protection. Active devices back then were very expensive (one hour of an engineer's salary per 100 W input in the HF band.)
 

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Yes you are right, there is a negative series feedback due to the source resistor that stabilize the FET's OP.
One think remains unclear for me: Why the GaAS FET and MESFETS manufacturers don't recommend the float source as valid alternative to bias the devices.
I tried once to use an inverter to generate the negative bias. Inside the same house there was a VCO with a transfer function equal to 30MHz/Volt. Despite all care taken wit bypass, grounding, etc...the leakage of switching frequency from the inverter was enough to modulate the VCO with a huge deviation.
After that I never more used negative inverters to get the gate bias adopting the float source definitively.

NandoPG
 

VSWR

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GaAS FET source grounding

There are two reasons for this:

1) At higher frequencies there is not possible to decouple a source resistor to ground with an infinite good capacitor, some inductance to ground remains. Even if you use e.g. two decoupling capacitors at each source leg of e.g. a Micro-X case. Inductance between source to ground gives lower RF gain. And - in some cases - RF instability of the device.

2) Heat due to power dissipation is mainly conducted through the source leads. There are usually two source legs provided for sufficient heat transfer AND low inductance to ground (see 1) above). Manufacturers recommendation is to use several parallelled via holes to ground on the source pads on the substrate board. The parallelled via holes will give you lower thermal resistance between source legs and ground and lower inductance to ground as well.

If you can live with less gain-per-stage and have control of the stability, decoupled source resistors requires a less complicated power supply. But more transistor stages may be required to meet an overall gain spec.

One think remains unclear for me: Why the GaAS FET and MESFETS manufacturers don't recommend the float source as valid alternative to bias the devices.
 

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Re: inverter to generate the negative bias

I have successfully used a switching inverter many times for creation of negative DC supply voltage for sensitive VCO's. However, you have to use a carefully designed linear voltage regulator between the inverter and the supply leads of the VCO. In some designs over 60 dB (!) of attenuation was required - at the inverter switching frequency - in order to meet the spuroius suppression spec of the VCO output RF signal. But most linear supply application notes gives hints how to design these type of linear voltage regulators.

I tried once to use an inverter to generate the negative bias. Inside the same house there was a VCO with a transfer function equal to 30MHz/Volt. Despite all care taken wit bypass, grounding, etc...the leakage of switching frequency from the inverter was enough to modulate the VCO with a huge deviation.
After that I never more used negative inverters to get the gate bias adopting the float source definitively.
 

nandopg

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1- As to the bypass of the source resistor I have been using a very careful simulated array of caps (not only one or two caps), so that the AC impedance to ground is less than 0.3 Ohms from 1MHz to at least 3 times the operating frequency range.

2- The electrical isolation from ground is provided by thermal conducting material. Comparing the temperature of a 180 mils flanged package for a 10Watts PA at full power after thermal balance be reached, I got 4C of difference. The reliability of the device regarding this small increase in temperature doesn't change.

3- The connection of the bypass capacitor array to the FET follows different techniques depending on the kind of package. As I said before a multi-decade bypassed has been achieved and any degradation in performance or instability has been noted in an extended temperature range.

Some additional comments:
1- A GaAs FET when pushed to a light class AB tends to increase the gate current at low temperatures(-40C range). For a well matched device for example in a 10W amplifier, it is easy to have more than 40mA flowing through the gate junction at low temperature, so that a low power inverter can be a true problem.

2- I believe in what you say about to keep the leakage of switching frequency at low level only if you have a reasonable physical distance between the VCO and the PA. However in compact wireless packages you don't have more than 2 inch between VCO and PA and so the problem of periodic noise is real, even more in narrow band transmitters. This for not to say about the space used by an inverter and associated circuit.

So, the arguments you presented above for not to use a floating source's FET are correct but surpassed.

Thanks for all the considerations but I continue to stimulate the use of a floating source bias.

NandoPG
 

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