Power estimation at LOGIC level

[nagssmiles]

Hello Sir/Madam,

I have a verilog file, I have to find the power dissipation of the circuit at gate level. Can anyone suggest me which software is helpful in finding the power dissipation of the circuit at gate level. Please give me the details how i can use that software to find power dissipation. I have Xilinx ISE and modelsim.

 

[kirteshmiet]

you can use encounter power system or synopsys power tool.

 

[rca]

I don't know if the FPGA tool vendor have some power consumption estimation.

But normaly, to know the power of a design:
1- simulate a netlist with backannotated timing in your power-functional case, export a VCD or SAIF
2- with tool like primetimePX, based on the VCD/SAIF, report the power, and also generate a fsdb, you read it with zWave (or something like this) to see the power waveform over the time.

Encounter Power System & Synopsys Power tool could do that but also more stuff, like IR Drop...