One possibility is the gate drive signal coupled to the power stage. This happens to the high side Ntype boost strap gate drive when you has damping resistor connected in between high side gate and source.
The efficiency calculation includes the power consumption in the gate driver. This is really wierd phenomenan. Is there any other possibility for this?
Hi
how i can calculate efficiency of dc-dc converter using cadence?
by calculator or ocean script or pss analysis or what?????????
pllllllllz anyone help me
thanks in advance