Post-synthesis STA with PrimeTime

Atre · Nov 3, 2005

sta fanout

Hello,

I have a problem concerning STA on a design after synthesis.

In DC, I set ideal_network on reset pin.
In PrimeTime it seems I can not do that and it reports lots of transition violations.
How can I tell to PrimeTime that reset net is ideal.

Generally speaking, how can I do STA on post-synthesis design, using the constraints from DC???

Hope someone can help!

Best regards,
Atre.

ldm · Nov 3, 2005

sta prime time

just stack the reset at inactive level...

ami · Nov 4, 2005

get_nets with high fanout in dc

Just set_false_path from that_reset_signal

xworld2008 · Nov 4, 2005

in general, pre-layout STA is used for check constraints integrality. and PT can't set_ideal_net for high fanout nets. So if you need check for prelayout, you can w
rite a scripts to set high fanout nets(exp.> 100) as ideal nets.
in this script:
(1) first, need find all fanout nets,
(2) set_load 0 -subtract_pin_load [get_nets $net]
set_resistance 0 [get_nets $net]

Atre · Nov 4, 2005

xworld2008 said:
in general, pre-layout STA is used for check constraints integrality. and PT can't set_ideal_net for high fanout nets. So if you need check for prelayout, you can w
rite a scripts to set high fanout nets(exp.> 100) as ideal nets.
in this script:
(1) first, need find all fanout nets,
(2) set_load 0 -subtract_pin_load [get_nets $net]
set_resistance 0 [get_nets $net]

Thank you. Problem solved!

jjww110 · Nov 7, 2005

set drive 0 can also solve your problem!!

Post-synthesis STA with PrimeTime

Atre

Full Member level 1

ldm

Member level 1

ami

Member level 3

xworld2008

Full Member level 4

Atre

soloktanjung

Atre

Full Member level 1

jjww110

Full Member level 5

Similar threads

Post-synthesis STA with PrimeTime

Full Member level 1

Member level 1

Member level 3

Full Member level 4

Full Member level 1

Full Member level 5

Similar threads

Privacy & Transparency

Privacy & Transparency