The capacitor's spectre view describes a special capacitor with fixed structure, dimensions, i.e. layout, and already includes its parasitics. Its layout view tells the extractor to not re-extract these parasitics. So if you use the layout view of this (same) capacitor, the pre- and post-layout simulation results will not differ by much - just the connection wires make a difference.
The reason for this method is to achieve already a relatively reasonable pre-layout sim. result, which makes good sense for RF circuit development. Of course it's necessary to use only this standard cap layout, multiples of these if necessary.
In contrary the symbol view of the resistor just describes an ideal resistor, i.e. nothing more than its resistance value in [Ω]. Your resistor layout - extracted for the post-layout netlist - will include all the parasitics the extractor is instructed to extract (sic), hence the simulation results will differ much more.
Resistor layouts usually differ too much as to use the same method as for caps.