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Post fit HDL Simulation in ModelSim

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nanisan

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I have designed a simple state machine in VHDL but when doing the post fit HDL Simulation in ModelSim I am not able to track them in the waveform viewer (I am only able to see the signals/states in the behavioural simulation).
Is there an attribute that I can use so that these signals are also synthesized?


type STATE_TYPE is (IDLE, TEST,ADDR_DECODE, DATA_TRS);
signal prs_state, next_state : STATE_TYPE;
 

nanisan said:
I have designed a simple state machine in VHDL but when doing the post fit HDL Simulation in ModelSim I am not able to track them in the waveform viewer (I am only able to see the signals/states in the behavioural simulation).
Is there an attribute that I can use so that these signals are also synthesized?


type STATE_TYPE is (IDLE, TEST,ADDR_DECODE, DATA_TRS);
signal prs_state, next_state : STATE_TYPE;

This depends on your Synthesis Tool. Look in the manual for something similar like "preserve names"
 

only for post fit hdl simulation you can set the default values for all of states.
after simulation (after good result) you can delete the default state of states of the fsm.
 

Generally HDL can be synthesized by default set of synthesis tools if your code are right for synthesized .
Are you sure your HDL description can be synthesized?

if yes,maybe you can set another Simu clock frequence and try it !
if not ,your can post your code here maybe someone will be help you alter your code to synthesized one .
 

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