I've done some bipolar power MOSFET drivers (back in the
'80s and '90s, before HV CMOS / BCDMOS was suitably
robust for my end markets). Took a lot of care to stay out
of saturation and meet the ~50nS prop delays, loaded.
Those could run out past 1MHz but really the frequency
is less the problem, than the short-pulse limit - where do
you start to see runt pulses which could drive the FETs
badly enough to damage? What then is your min / max
duty cycle position, and does this leave margin in the
design's control range vs VIN, IOUT, etc.?
Now doing this with discretes, you'd care a lot about the
saturation behavior and this tends to be poorly spec'd
(if at all) - let alone modeled for you to play with bias
and clamping accurately enough to ensure the design
works, and works indefinitely.
Never seen a SiC PNP. Have seen "super junction
transistors" from GeneSiC which sure do look like an
NPN, although they purport to be majority-carrier-
only. Fast, tough (good avalanche rating, but you
do not care, here), come in not-huge (but not that
petite) currents on up to tens of amps. Some at
Digi-Key and other distributors.
My first bipolar MOSFET driver in fact used an all-NPN
totem pole, with PNPs playing only supporting roles -
a traditional TTL phase splitter, basically - and if you
can stand the waste heat in the pullup resistor the
sky's about the limit for implementing a discrete SJT
based gate-drive (or for that matter, power train).