plotting of gm/Id vs Vgs and Id/w vs. Vgs for a fixed length

[rishabh_31ec]

Hi I am plotting gm/Id vs Vgs and Id/w vs. Vgs for a PMOS as diode connected ( source and Body are connected to higher supply 1.8V , while gate and drain are connected to each other). Now a variable voltage supply Vg is connected between gate and ground and Vg varies from 0 to 1.8 volt.
Now my question is ,

whether these plots are also valid for a PMOS which is saturated but not in diode connected mode...
if not, then how can I plot this.
Foundry: tsmc. Process: 180nm

 

[erikl]

... whether these plots are also valid for a PMOS which is saturated but not in diode connected mode...

Sure it is. Just add a power supply between drain & GND.