using a sampler as a mixer does not improve the 20 Log N phase noise. The reason is depicted attached.
But it is even worse than that. The sampler will have a poor conversion loss and a limited compression point, so your far from the carrier noise floor will be poor (if you try to use a high loop bandwidth).
Also, because of aliasing, you will be sampling the thermal noise at all of the sidebands +/- the SRD spikes. ie. if your SRD is driven by a 1 GHz source, and you are trying to sample a 40.1 GHz signal, your sampler will output a 100 MHz that is a composite of all signals: 1.9, 2.1, 2.9, 3.1....39.9, 40.1, 40.9..... so there will be a lot of added noise. You would have to do some fancy antialiasing BANDPASS filtering and 40 GHz LNA work to overcome that.
Never the less, you are right. There are a lot of Phase Locked DRO oscillators that work this way. They get away with it by using a narrow loop bandwidth and having a high Q fixed oscillator. Tunable PLLs will be more challenging.