Please Help, 8T Sram Design

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swetha8613

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Hello All

I have a class project in which I am designing an 8T SRAM cell in LTSpice. Does anyone have block diagram of 8T sram and some basic info about its operations....what all can I include in analysis as to get a good grade.Please help!!
 

So you really applied yourself to searching, and found nothing
at all on one of the most common memory cells?

It's just a pair of weak cross-coupled inverters and a pair of
strong CMOS pass-gates.

If you're not charged (heh) with designing the sense amp,
row/colum drivers and such, I'd say to concentrate on
showing that you have driven the limited design variables
to a local optimum of write margin, write time and write
charge, maybe static leakage, and provide some sense
of temperature and supply sensitivities.

But, gee, that is starting to look like some effort.
 

Thanks a bunch for replying...I could find lot of info on 6T sram but very less on 8T sram online!! Are they any websites that you might know will help me in designing this 8T sram?
 

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