zhangjavier
Advanced Member level 4
jitter accumulation
thanks
thanks
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sengyee88 said:Because DLL has clock input, it is just a delay element for the input clock. It will resynchronized to input and jitter accumulation will be reset.
PLL do not has input clock, it generate its own clock from VCO. Hence, jitter will be accumulated.
liuyonggen_1 said:sengyee88 said:Because DLL has clock input, it is just a delay element for the input clock. It will resynchronized to input and jitter accumulation will be reset.
PLL do not has input clock, it generate its own clock from VCO. Hence, jitter will be accumulated.
i will start to design PLL, could you show me some useful books about analog PLL? thanks !
sengyee88 said:Because DLL has clock input, it is just a delay element for the input clock. It will resynchronized to input and jitter accumulation will be reset.
PLL do not has input clock, it generate its own clock from VCO. Hence, jitter will be accumulated.
Read Dean's book.. you can download it for free from National website..
Regards,
Ahmad,