nizdom
Member level 2
Hi guys! I need some help.
Here is the scenario, in the first timeslot (or one cycle), a value is outputted. Then on the next timeslot, the same signal but it is already updated to anew value. What should I do so that I can use the value from the first timeslot during the second timeslot. Take note that on the second timeslot, the value changes already but what I need is the value from the previous timeslot. Am I gonna store it? How? Help please. newbie here in VHDL. Thanks.
Here is the scenario, in the first timeslot (or one cycle), a value is outputted. Then on the next timeslot, the same signal but it is already updated to anew value. What should I do so that I can use the value from the first timeslot during the second timeslot. Take note that on the second timeslot, the value changes already but what I need is the value from the previous timeslot. Am I gonna store it? How? Help please. newbie here in VHDL. Thanks.