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PICC18 linker boundary @ 0x3FFF->0x4000

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Kovake

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After half a year of more or less successfull coding for 18Fxxx I landed in particularly intresting blockage. PL4 linker refuses to split text ( code ) psect at 0x4000 ( half way of flash ).
Once the lower half fills up linker manages to locate only about 1.5kB of ROM data there and tries to move the whole remaining chunk in the upper half. If this chunk is larger than 0x4000 bytes ie. does not fit in side the upper half linker just tels "Can't find 0x4XXX words for psect text in segment CODE". I do notice it references WORDS ( 2 bytes ) but it does not make sense.
I have managed to compile the very source with PL2 or earlier compiler and it obviously worked well since the application runs well.
Also I ( just for reference ) compiled the same source for 18F8620 and it fitted fine under 0x7FFF. last used address was 0x5250. ( unfortunately object seemed not to run correctly on 18F452 device. ) I am aware of my limited understanding of the compilation process it self 8O ;-)
 

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