Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

phase difference measurement

Status
Not open for further replies.

pisoiu

Advanced Member level 3
Advanced Member level 3
Joined
Dec 31, 2002
Messages
750
Helped
43
Reputation
86
Reaction score
21
Trophy points
1,298
Location
Romania
Activity points
7,883
Hi,
Does anyone have any idea how can I measure the phase difference between two digital signals? Nothing special so far, but one signal is a PECL 200Mhz clock and the other is a trigger signal (low to high edge) which may appear anywhere between those two raising edges of the clock signal...and I want to know where. I had some ideas ( track and hold circuit followed by an ADC, but I haven't found a fast enough ic). An discrete track and hold circuit with a switch which charge/discharge a cap from the clock source continuously untill the trigger occur is also a dream, because the switch must turn into off state in a period <1ns to preserve a acceptable error between the ideal point and the real point. The fastest switch I found have toff=5ns...which is the period of my signal....so....any ideas? Thx.
 

Here is one conceptual method. Use an edge triggered RS flip flop so you get an output pulse whose width is equal to the time offset. Put this to a RC network so you get a ramp that goes up during the pulse. Select the value so that the output is about 80% of the full value for a maximum width pulse. Put a schottky diode in series with the resistor so that when the input goes down the capacitor is not immediately discharged. Follow this by a peak detector and then your adc. You can put a resistor across the capacitor so that it slowly discharges before the next time you want to make a reading. You will have to process the output of the adc to take the diode drop effects into account.
 

The average output of a edge triggered RS flip flop is a measure of the phase. Just use an RC to filter it and then process. This only works for periodic signals. Its the principle of a PLL.

Bastos
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top